The present invention relates to a semiconductor memory device, and particularly to a semiconductor memory device that can be suitably adapted to a static random access memory (hereinafter also referred to as static RAM or SRAM) which has a large capacity and which operates at high speeds.
A semiconductor memory device is typically comprised of memory cells for storing information, complementary data line pairs D, D connected to the memory cells, and word lines that are connected to the memory cells and that transmit control signals to control the electric connection with respect to the memory cells and to the complementary data line pairs D, D.
In recent years, it has been urged to provide a semiconductor memory device which has a large capacity and which operates at high speeds. To meet such a demand, Hitachi, Ltd. has developed a static RAM which operates at a high speed while consuming reduced amounts of electric power by combining Bipolar and CMOS elements that will be described later. The present invention deals with technology which is adapted to producing an ultra-high-speed RAM as represented by the static RAM that operates at a further increased speed, while reliably preventing erroneous reading of data that may be caused by deviation in timings of the RAM and enabling the reliability to increase.
The present invention was accomplished by the inventors of the present invention as a result of development of such a static RAM.